HetCore: TFET-CMOS hetero-Device architecture for CPUs and GPUs

Bhargava Gopireddy, Dimitrios Skarlatos, Wenjuan Zhu, Josep Torrellas

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Tunneling Field-Effect Transistors (TFETs) attain much higher energy efficiency than CMOS at low voltages. However, their performance saturates at high voltages and, therefore, cannot replace CMOS when high performance is needed. Ideally, we desire a core that is as energy-efficient as a TFET core and provides as much performance as a CMOS core. To approach this goal, this paper judiciously integrates both TFET units and CMOS units in a single core, effectively creating a hetero-device core. We call it HetCore, and present CPU and GPU versions. In HetCore, TFETs are used in units that consume high power under CMOS, are amenable to pipelining or are not very latency sensitive, and use a sizable area. HetCore powers CMOS and TFET units at different voltage levels, so they operate optimally. However, all units are clocked at the same frequency. Our results based on simulations running standard applications show the potential of this approach, even with conservative assumptions. A HetCore CPU consumes on average 39% less energy than a CMOS CPU, while delivering an average performance that is within 10% of the CMOS CPU. In addition, under a fixed power budget, a multicore with HetCore CPUs can employ twice as many cores as a multicore with CMOS CPUs, resulting in average performance gains of 32% while, at the same time, improving the energy efficiency (ED2) by an average of 68%. Similar results are obtained with HetCore GPUs.

Original languageEnglish (US)
Title of host publicationProceedings - 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture, ISCA 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages802-815
Number of pages14
ISBN (Electronic)9781538659847
DOIs
StatePublished - Jul 19 2018
Event45th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2018 - Los Angeles, United States
Duration: Jun 2 2018Jun 6 2018

Publication series

NameProceedings - International Symposium on Computer Architecture
ISSN (Print)1063-6897

Other

Other45th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2018
Country/TerritoryUnited States
CityLos Angeles
Period6/2/186/6/18

Keywords

  • CPU
  • Core architecture
  • GPU
  • Hybrid TFET-CMOS architecture
  • TFET

ASJC Scopus subject areas

  • Hardware and Architecture

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