TY - JOUR
T1 - Heat generation and transport in nanometer-scale transistors
AU - Pop, Eric
AU - Sinha, Sanjiv
AU - Goodson, Kenneth E.
N1 - Funding Information:
Manuscript received February 9, 2005; revised February 7, 2006. This work was supported by the Semiconductor Research Corporation (SRC) under Task 1043. The work of E. Pop was supported by a joint SRC/IBM graduate fellowship. The work of S. Sinha was supported by a Stanford Graduate Fellowship (SGF) and an Intel fellowship. E. Pop was with the Department of Electrical Engineering, Stanford University, Stanford, CA 94305 USA. He is now with Intel Corp. Santa Clara, CA 95054 USA. S. Sinha was with the Department of Mechanical Engineering, Stanford University, Stanford CA 94305 USA. He is now with Intel Corp, Hillsboro, OR 97124 USA. K. E. Goodson is with the Department of Mechanical Engineering, Stanford University, Stanford, CA 94305 USA (e-mail: [email protected]).
Funding Information:
Eric Pop received the M.Eng. and S.B., degrees in electrical engineering and the S.B. degree in physics from the Massachusetts Institute of Tech- nology, Cambridge, in 1999 and the Ph.D. degree from Stanford University, Stanford, CA, in electri- cal engineering in 2005, supported by a joint SRC/IBM fellowship. In 2005 he did postdoctoral research on the electrical and thermal properties of carbon nano- tubes at Stanford. He is currently an Intel Researcher in Residence in the Stanford Center for Integrated Systems. He is interested in charge and heat transport in nanoscale and molecular devices, power issues in nanoelectronics, phase change memory, and device and materials characterization.
PY - 2006/8
Y1 - 2006/8
N2 - As transistor gate lengths are scaled towards the 10-nm range, thermal device design is becoming an important part of microprocessor engineering. Decreasing dimensions lead to nanometer-scale hot spots in the transistor drain region, which may increase the drain series and source injection electrical resistances. Such trends are accelerated by the introduction of novel materials and nontraditional transistor geometries, including ultrathin body, FinFET, or nanowire devices, which impede heat conduction. Thermal analysis is complicated by subcontinuum phenomena including ballistic electron transport, which reshapes the heat generation region compared with classical diffusion theory predictions. Ballistic phonon transport from the hot spot and between material boundaries impedes conduction cooling. The increased surface to volume ratio of novel transistor designs also leads to a larger contribution from material boundary thermal resistance. This paper surveys trends in transistor geometries and materials, from bulk silicon to carbon nanotubes, along with their implications for the thermal design of electronic systems.
AB - As transistor gate lengths are scaled towards the 10-nm range, thermal device design is becoming an important part of microprocessor engineering. Decreasing dimensions lead to nanometer-scale hot spots in the transistor drain region, which may increase the drain series and source injection electrical resistances. Such trends are accelerated by the introduction of novel materials and nontraditional transistor geometries, including ultrathin body, FinFET, or nanowire devices, which impede heat conduction. Thermal analysis is complicated by subcontinuum phenomena including ballistic electron transport, which reshapes the heat generation region compared with classical diffusion theory predictions. Ballistic phonon transport from the hot spot and between material boundaries impedes conduction cooling. The increased surface to volume ratio of novel transistor designs also leads to a larger contribution from material boundary thermal resistance. This paper surveys trends in transistor geometries and materials, from bulk silicon to carbon nanotubes, along with their implications for the thermal design of electronic systems.
KW - Ballistic
KW - Carbon nanotubes
KW - Germanium-on-insulator (GOI)
KW - Heat generation
KW - MOSFET
KW - Monte Carlo
KW - Nonequilibrium
KW - Phonon
KW - Power density
KW - Scaling
KW - Silicon-on-insulator (SOI)
KW - Temperature
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U2 - 10.1109/JPROC.2006.879794
DO - 10.1109/JPROC.2006.879794
M3 - Article
AN - SCOPUS:33845692228
SN - 0018-9219
VL - 94
SP - 1587
EP - 1601
JO - Proceedings of the IEEE
JF - Proceedings of the IEEE
IS - 8
ER -