Hardware-in-the-loop co-design testbed for flying capacitor multilevel converters

Nathan Pallo, Thomas Foulkes, Tomas Modeer, Edwin Fonkwe, Petar Gartner, Robert C.N. Pilawa-Podgurski

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The multilevel flying capacitor topology is a promising technology for future electric aircraft, where high specific power density power converters are required. Hardware-in-the loop co-design can improve design throughput as more complex implementations of this technology are developed. This paper presents a comparison of hardware-in-the-loop emulation and hardware prototype results for 3-, 5- and 7-level flying capacitor converters. The fidelity of the emulation is investigated for both dc-dc and inverter operation and it is shown that, within certain limits, the converter operation can be emulated closely.

Original languageEnglish (US)
Title of host publication2017 IEEE Power and Energy Conference at Illinois, PECI 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509055517
DOIs
StatePublished - May 30 2017
Event2017 IEEE Power and Energy Conference at Illinois, PECI 2017 - Urbana, United States
Duration: Feb 23 2017Feb 24 2017

Publication series

Name2017 IEEE Power and Energy Conference at Illinois, PECI 2017

Other

Other2017 IEEE Power and Energy Conference at Illinois, PECI 2017
CountryUnited States
CityUrbana
Period2/23/172/24/17

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering

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