Abstract
This paper presents a novel hardware-based approach for identifying, profiling, and monitoring hot spots in order to support runtime optimization of general-purpose programs. The proposed approach consists of a set of tightly coupled hardware tables and control logic modules that are placed in the retirement stage of a processor pipeline removed from the critical path. The features of the proposed design include rapid detection of program hot spots after changes in execution behavior, runtime-tunable selection criteria for hot spot detection, and negligible overhead during application execution. Experiments using several SPEC95 benchmarks, as well as several large WindowsNT applications, demonstrate the promise of the proposed design.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 136-147 |
| Number of pages | 12 |
| Journal | Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA |
| State | Published - 1999 |
| Event | Proceedings of the 1999 26th Annual International Symposium on Computer Architecture - ISCA '99 - Atlanta, GA, USA Duration: May 2 1999 → May 4 1999 |
ASJC Scopus subject areas
- Hardware and Architecture