TY - GEN
T1 - Hardware and software combined detection of system-level ESD-induced soft failures
AU - Vora, Sandeep
AU - Jiang, Rui
AU - Vijayaraj, Prajwal Mysore
AU - Feng, Keven
AU - Xiu, Yang
AU - Vasudevan, Shobha
AU - Rosenbaum, Elyse
N1 - This material is based upon work supported by the National Science Foundation under Grant No. 1526106. The authors would like to thank Mr. O. Girard for design of the open source core and useful discussions. We also thank Dr. Karan Bhatia of Texas Instruments for discussions about microcontroller design.
PY - 2018/10/25
Y1 - 2018/10/25
N2 - A semi-custom microcontroller is subjected to IEC-61000-4-2 ESD. A scan chain and memory read-out programs enable identification of the hardware blocks that experience soft failures. Voltage monitors are used to correlate the occurrence of those failures with the magnitude of noise on power supplies.
AB - A semi-custom microcontroller is subjected to IEC-61000-4-2 ESD. A scan chain and memory read-out programs enable identification of the hardware blocks that experience soft failures. Voltage monitors are used to correlate the occurrence of those failures with the magnitude of noise on power supplies.
UR - https://www.scopus.com/pages/publications/85056896781
UR - https://www.scopus.com/pages/publications/85056896781#tab=citedBy
M3 - Conference contribution
AN - SCOPUS:85056896781
T3 - Electrical Overstress/Electrostatic Discharge Symposium Proceedings
BT - Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2018
PB - ESD Association
T2 - 40th Annual Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2018
Y2 - 23 September 2018 through 28 September 2018
ER -