Abstract
The internal model-based H∞ full information steady-state bumpless transfer synthesis procedure is developed and demonstrated to provide near optimal robust stability and robust performance for a much larger class of controller uncertainty than the earlier developed LQ state/output transfer. It is also pointed out that the steady-state bumpless transfer under controller uncertainty represents, in general, a hybrid mode of system behavior-a controlled discrete transition.
Original language | English (US) |
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Pages (from-to) | 1718-1723 |
Number of pages | 6 |
Journal | IEEE Transactions on Automatic Control |
Volume | 54 |
Issue number | 7 |
DOIs | |
State | Published - 2009 |
Keywords
- Bumpless transfer
- Computational speedup
- Controller uncertainty
- Robust control
ASJC Scopus subject areas
- Control and Systems Engineering
- Computer Science Applications
- Electrical and Electronic Engineering