Guaranteeing the end-to-end latency of an IMA system with an increasing workload

Min Young Nam, Jaemyoun Lee, Kyung Joon Park, Lui Sha, Kyungtae Kang

Research output: Contribution to journalArticlepeer-review


New features are often added incrementally to avionics systems to minimize the need for redesign and recertification. However, it then becomes necessary to check that the timing constraints of existing as well as new applications are met. We facilitate these checks by introducing a new data switch that bounds the latency of end-to-end communications across a network. This switch runs a clock-driven switching algorithm that is throughput-optimal with a bounded worst-case delay for all feasible traffic. We propose associated heuristics that determine whether the timing constraints of an integrated modular avionics (IMA) system network that uses this switch are met, even if new features have caused traffic to increase, and then search for alternative network configurations if necessary. Virtual integration is used to make a combined analysis of the worst-case delay in the network and the local buses of individual computing modules. This analysis considers the shared network topology, local hardware architectures, and specified IMA configurations. Our approach can be used by a system architect as an effective method for quickly determining which possible system architectures should be pursued to meet timing constraints, and it allows the cascading effects of changes to be tracked and managed. We demonstrate how these heuristics work through an example in which changes are made to an environmental monitoring facility within an avionics system that uses our switch.

Original languageEnglish (US)
Article number6399465
Pages (from-to)1460-1473
Number of pages14
JournalIEEE Transactions on Computers
Issue number6
StatePublished - Jun 2014


  • Virtual integration
  • end-to-end latency
  • integrated modular avionics (IMA)
  • real-time switch

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics


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