GoldMine: Automatic assertion generation using data mining and static analysis

Shobha Vasudevan, David Sheridan, Sanjay Jeram Patel, David Tcheng, Bill Tuohy, Daniel Johnson

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We present GOLDMINE, a methodology for generating assertions automatically. Our method involves a combination of data mining and static analysis of the Register Transfer Level (RTL) design. We present results of using GoldMine for assertion generation of the RTL of a 1000-core processor design that is still in an evolving stage. Our results show that GoldMine can generate complex, high coverage assertions in RTL, thereby minimizing human effort in this process.

Original languageEnglish (US)
Title of host publicationDATE 10 - Design, Automation and Test in Europe
Pages626-629
Number of pages4
StatePublished - Jun 9 2010
EventDesign, Automation and Test in Europe Conference and Exhibition, DATE 2010 - Dresden, Germany
Duration: Mar 8 2010Mar 12 2010

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

OtherDesign, Automation and Test in Europe Conference and Exhibition, DATE 2010
CountryGermany
CityDresden
Period3/8/103/12/10

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Vasudevan, S., Sheridan, D., Patel, S. J., Tcheng, D., Tuohy, B., & Johnson, D. (2010). GoldMine: Automatic assertion generation using data mining and static analysis. In DATE 10 - Design, Automation and Test in Europe (pp. 626-629). [5457129] (Proceedings -Design, Automation and Test in Europe, DATE).