Goal-oriented stimulus generation for analog circuits

Seyed Nematollah Ahmadyan, Jayanand Asok Kumar, Shobha Vasudevan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We present a methodology to generate goal-oriented test cases for verifying nonlinear analog circuits. We use a learning-based approach to identify the goal regions in circuit's state space. We use the information that we learn to guide the growth of Rapidly-exploring Random Trees (RRTs) towards these goal regions. Compared to previous approaches for test generation, our methodology generates several test cases of the circuit that are more concentrated in the relevant operating regions. We demonstrate the effectiveness of our approach on typical case studies. We show that our methodology can be used to generate test cases for undesirable behavior that was previously hard to detect.

Original languageEnglish (US)
Title of host publicationProceedings of the 49th Annual Design Automation Conference, DAC '12
Pages1018-1023
Number of pages6
DOIs
StatePublished - 2012
Externally publishedYes
Event49th Annual Design Automation Conference, DAC '12 - San Francisco, CA, United States
Duration: Jun 3 2012Jun 7 2012

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Other

Other49th Annual Design Automation Conference, DAC '12
Country/TerritoryUnited States
CitySan Francisco, CA
Period6/3/126/7/12

Keywords

  • pre-si testing
  • rapidly-exploring random trees

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

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