TY - GEN
T1 - GDOT
T2 - 36th IEEE Symposium on VLSI Technology, VLSI Technology 2016
AU - Wang, Ning C.
AU - Gonugondla, Sujan K.
AU - Nahlus, Ihab
AU - Shanbhag, Naresh R.
AU - Pop, Eric
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/9/21
Y1 - 2016/9/21
N2 - Though much excitement surrounds two-dimensional (2D) beyond CMOS fabrics like graphene and MoS2, most efforts have focused on individual devices, with few high-level implementations. Here we present the first graphene-based dot-product nanofunction (GDOT) using a mixed-signal architecture. Dot product kernels are essential for emerging image processing and neuromorphic computing applications, where energy efficiency is prioritized. SPICE simulations of GDOT implementing a Gaussian blur show up to ∼104 greater signal-To-noise ratio (SNR) over CMOS based implementations-a direct result of higher graphene mobility in a circuit tolerant to low on/off ratios. Energy consumption is nearly equivalent, implying the GDOT can operate faster at higher SNR than CMOS counter-parts while preserving energy benefits over digital implementations. We implement a prototype 2-input GDOT on a wafer-scale 4″ process, with measured results confirming dot-product operation and lower than expected computation error.
AB - Though much excitement surrounds two-dimensional (2D) beyond CMOS fabrics like graphene and MoS2, most efforts have focused on individual devices, with few high-level implementations. Here we present the first graphene-based dot-product nanofunction (GDOT) using a mixed-signal architecture. Dot product kernels are essential for emerging image processing and neuromorphic computing applications, where energy efficiency is prioritized. SPICE simulations of GDOT implementing a Gaussian blur show up to ∼104 greater signal-To-noise ratio (SNR) over CMOS based implementations-a direct result of higher graphene mobility in a circuit tolerant to low on/off ratios. Energy consumption is nearly equivalent, implying the GDOT can operate faster at higher SNR than CMOS counter-parts while preserving energy benefits over digital implementations. We implement a prototype 2-input GDOT on a wafer-scale 4″ process, with measured results confirming dot-product operation and lower than expected computation error.
UR - http://www.scopus.com/inward/record.url?scp=84990967283&partnerID=8YFLogxK
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U2 - 10.1109/VLSIT.2016.7573377
DO - 10.1109/VLSIT.2016.7573377
M3 - Conference contribution
AN - SCOPUS:84990967283
T3 - Digest of Technical Papers - Symposium on VLSI Technology
BT - 2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 13 June 2016 through 16 June 2016
ER -