TY - GEN
T1 - GaAs FET with a high mobility self-assembled planar nanowire channel on a (100) substrate
AU - Fortuna, Seth A.
AU - Li, Xiuling
PY - 2009/12/11
Y1 - 2009/12/11
N2 - We demonstrate for the first time, a metal-semiconductor field-effect transistor (MESFET) fabricated with a self-assembled and high mobility <110> GaAs planar nanowire (NW) channel. The planar NWs were grown on GaAs (100) substrates with metalorganic chemical vapor deposition (MOCVD) through gold (Au) catalyzed vapor-liquid-solid (VLS) mechanism [1]. Unlike conventional out-of-plane <111> NWs, these <110> planar NWs grow self-aligned in the [0-11] or [01-1] directions laterally and epitaxially on the surface and stay effectively "pinned" to the (100) substrate during growth, as illustrated in Fig. la-b. They are also free of twin-defects that are often found in conventional <111> III-V NWs. In addition, they can also be transfer-printed to other substrates such as Si using a smart release scheme and standard contact printing [1]. All of these naturally make the planar NWs integratable and compatible with existing circuit design and process technology.
AB - We demonstrate for the first time, a metal-semiconductor field-effect transistor (MESFET) fabricated with a self-assembled and high mobility <110> GaAs planar nanowire (NW) channel. The planar NWs were grown on GaAs (100) substrates with metalorganic chemical vapor deposition (MOCVD) through gold (Au) catalyzed vapor-liquid-solid (VLS) mechanism [1]. Unlike conventional out-of-plane <111> NWs, these <110> planar NWs grow self-aligned in the [0-11] or [01-1] directions laterally and epitaxially on the surface and stay effectively "pinned" to the (100) substrate during growth, as illustrated in Fig. la-b. They are also free of twin-defects that are often found in conventional <111> III-V NWs. In addition, they can also be transfer-printed to other substrates such as Si using a smart release scheme and standard contact printing [1]. All of these naturally make the planar NWs integratable and compatible with existing circuit design and process technology.
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U2 - 10.1109/DRC.2009.5354978
DO - 10.1109/DRC.2009.5354978
M3 - Conference contribution
AN - SCOPUS:76549135327
SN - 9781424435289
T3 - Device Research Conference - Conference Digest, DRC
SP - 19
EP - 20
BT - 67th Device Research Conference, DRC 2009
T2 - 67th Device Research Conference, DRC 2009
Y2 - 22 June 2009 through 24 June 2009
ER -