FracBNN: Accurate and fpga-efficient binary neural networks with fractional activations

Yichi Zhang, Junhao Pan, Xinheng Liu, Hongzheng Chen, Deming Chen, Zhiru Zhang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Binary neural networks (BNNs) have 1-bit weights and activations. Such networks are well suited for FPGAs, as their dominant computations are bitwise arithmetic and the memory requirement is also significantly reduced. However, compared to start-of-the-art compact convolutional neural network (CNN) models, BNNs tend to produce a much lower accuracy on realistic datasets such as ImageNet. In addition, the input layer of BNNs has gradually become a major compute bottleneck, because it is conventionally excluded from binarization to avoid a large accuracy loss. This work proposes FracBNN, which exploits fractional activations to substantially improve the accuracy of BNNs. Specifically, our approach employs a dual-precision activation scheme to compute features with up to two bits, using an additional sparse binary convolution. We further binarize the input layer using a novel thermometer encoding. Overall, FracBNN preserves the key benefits of conventional BNNs, where all convolutional layers are computed in pure binary MAC operations (BMACs). We design an efficient FPGA-based accelerator for our novel BNN model that supports the fractional activations. To evaluate the performance of FracBNN under a resource-constrained scenario, we implement the entire optimized network architecture on an embedded FPGA (Xilinx Ultra96 v2). Our experiments on ImageNet show that FracBNN achieves an accuracy comparable to MobileNetV2, surpassing the best-known BNN design on FPGAs with an increase of 28.9% in top-1 accuracy and a 2.5x reduction in model size. FracBNN also outperforms a recently introduced BNN model with an increase of 2.4% in top-1 accuracy while using the same model size. On the embedded FPGA device, FracBNN demonstrates the ability of real-time image classification.

Original languageEnglish (US)
Title of host publicationFPGA 2021 - 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
PublisherAssociation for Computing Machinery
Pages171-182
Number of pages12
ISBN (Electronic)9781450382182
DOIs
StatePublished - Feb 17 2021
Event2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2021 - Virtual, Online, United States
Duration: Feb 28 2021Mar 2 2021

Publication series

NameFPGA 2021 - 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

Conference

Conference2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2021
Country/TerritoryUnited States
CityVirtual, Online
Period2/28/213/2/21

Keywords

  • Binary neural networks
  • Deep learning
  • FPGA accelerators
  • High-level synthesis

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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