Abstract
Design automation or computer-aided design (CAD) for field programmable gate arrays (FPGAs) has played a critical role in the rapid advancement and adoption of FPGA technology over the past two decades. The purpose of this paper is to meet the demand for an up-to-date comprehensive survey/tutorial for FPGA design automation, with an emphasis on the recent developments within the past 5-10 years. The paper focuses on the theory and techniques that have been, or most likely will be, reduced to practice. It covers all major steps in FPGA design flow which includes: routing and placement, circuit clustering, technology mapping and architecture-specific optimization, physical synthesis, RT-level and behavior-level synthesis, and power optimization. We hope that this paper can be used both as a guide for beginners who are embarking on research in this relatively young yet exciting area, and a useful reference for established researchers in this field.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 195-330 |
| Number of pages | 136 |
| Journal | Foundations and Trends in Electronic Design Automation |
| Volume | 1 |
| Issue number | 3 |
| DOIs | |
| State | Published - Nov 1 2006 |
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Keywords
- Computer-aided design
- FPGA design
ASJC Scopus subject areas
- Hardware and Architecture
- Computer Graphics and Computer-Aided Design
Cite this
FPGA design automation : A survey. / Chen, Deming; Cong, Jason; Pan, Peichen.
In: Foundations and Trends in Electronic Design Automation, Vol. 1, No. 3, 01.11.2006, p. 195-330.Research output: Contribution to journal › Review article
}
TY - JOUR
T1 - FPGA design automation
T2 - A survey
AU - Chen, Deming
AU - Cong, Jason
AU - Pan, Peichen
PY - 2006/11/1
Y1 - 2006/11/1
N2 - Design automation or computer-aided design (CAD) for field programmable gate arrays (FPGAs) has played a critical role in the rapid advancement and adoption of FPGA technology over the past two decades. The purpose of this paper is to meet the demand for an up-to-date comprehensive survey/tutorial for FPGA design automation, with an emphasis on the recent developments within the past 5-10 years. The paper focuses on the theory and techniques that have been, or most likely will be, reduced to practice. It covers all major steps in FPGA design flow which includes: routing and placement, circuit clustering, technology mapping and architecture-specific optimization, physical synthesis, RT-level and behavior-level synthesis, and power optimization. We hope that this paper can be used both as a guide for beginners who are embarking on research in this relatively young yet exciting area, and a useful reference for established researchers in this field.
AB - Design automation or computer-aided design (CAD) for field programmable gate arrays (FPGAs) has played a critical role in the rapid advancement and adoption of FPGA technology over the past two decades. The purpose of this paper is to meet the demand for an up-to-date comprehensive survey/tutorial for FPGA design automation, with an emphasis on the recent developments within the past 5-10 years. The paper focuses on the theory and techniques that have been, or most likely will be, reduced to practice. It covers all major steps in FPGA design flow which includes: routing and placement, circuit clustering, technology mapping and architecture-specific optimization, physical synthesis, RT-level and behavior-level synthesis, and power optimization. We hope that this paper can be used both as a guide for beginners who are embarking on research in this relatively young yet exciting area, and a useful reference for established researchers in this field.
KW - Computer-aided design
KW - FPGA design
UR - http://www.scopus.com/inward/record.url?scp=33846207439&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=33846207439&partnerID=8YFLogxK
U2 - 10.1561/1000000003
DO - 10.1561/1000000003
M3 - Review article
AN - SCOPUS:33846207439
VL - 1
SP - 195
EP - 330
JO - Foundations and Trends in Electronic Design Automation
JF - Foundations and Trends in Electronic Design Automation
SN - 1551-3939
IS - 3
ER -