Foundary fabricated array of smart pixels integrating MESFETs/MSMs and VCSELs

E. M. Hayes, R. Jurrat, R. Pu, R. D. Snyder, S. A. Feld, P. Stanko, C. W. Wilmsen, K. D. Choquette, K. M. Geib, H. Q. Hou

Research output: Contribution to journalArticlepeer-review

Abstract

We have developed a process for the integration of vertical cavity surface emitting lasers (VCSELs) with foundry fabricated integrated circuits using a co-planar flip-chip bump-bonding process. Metal-semiconductor-metal (MSMs) photodetectors are fabricated directly onto the integrated circuit through the Vitesse 1·0 μm E/D MESFET process along with the logic and VCSEL drivers. This technique can be used for the fabrication of OEICs by integrating VCSELs and photodetectors into an array of smart pixels, allowing much faster throughput than wire-bonding hybrid approaches.

Original languageEnglish (US)
Pages (from-to)229-237
Number of pages9
JournalInternational Journal of Optoelectronics
Volume11
Issue number3
StatePublished - May 1 1997
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials

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