We have developed a process for the integration of vertical cavity surface emitting lasers (VCSELs) with foundry fabricated integrated circuits using a co-planar flip-chip bump-bonding process. Metal-semiconductor-metal (MSMs) photodetectors are fabricated directly onto the integrated circuit through the Vitesse 1·0 μm E/D MESFET process along with the logic and VCSEL drivers. This technique can be used for the fabrication of OEICs by integrating VCSELs and photodetectors into an array of smart pixels, allowing much faster throughput than wire-bonding hybrid approaches.
|Original language||English (US)|
|Number of pages||9|
|Journal||International Journal of Optoelectronics|
|State||Published - May 1 1997|
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials