Flip-chip routing with unified area-I/O pad assignments for package-board co-design

Jia Wei Fang, Martin D.F. Wong, Yao Wen Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we present a novel flip-chip routing algorithm for package-board co-design. Unlike the previous works that can consider only either free- or pre-assignment routing, our router is the first work in the literature that can handle both the free-and pre-assignment routing. Based on the computational geometry techniques (e.g., the Delaunay triangulation and the Voronoi diagram), the router applies a unified network-flow formulation to perform congestion estimation for the pre-assignment routing. According to the congestion map, the network-flow formulation can also consider the free-assignment nets during the routing for the pre-assignment ones. Then, the router modifies the network-flow formulation to optimally assign and route the free-assignment nets, considering the routed pre-assignment nets. With the package and board co-design flow, we can achieve 100% routing completion. Experimental results based on industry designs demonstrate the high-quality of our algorithm.

Original languageEnglish (US)
Title of host publication2009 46th ACM/IEEE Design Automation Conference, DAC 2009
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages336-339
Number of pages4
ISBN (Print)9781605584973
DOIs
StatePublished - Jan 1 2009
Event2009 46th ACM/IEEE Design Automation Conference, DAC 2009 - San Francisco, CA, United States
Duration: Jul 26 2009Jul 31 2009

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Other

Other2009 46th ACM/IEEE Design Automation Conference, DAC 2009
CountryUnited States
CitySan Francisco, CA
Period7/26/097/31/09

Keywords

  • Detailed routing
  • Global routing
  • Physical design

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

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    Fang, J. W., Wong, M. D. F., & Chang, Y. W. (2009). Flip-chip routing with unified area-I/O pad assignments for package-board co-design. In 2009 46th ACM/IEEE Design Automation Conference, DAC 2009 (pp. 336-339). [5227130] (Proceedings - Design Automation Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/1629911.1630002