Fault behavior dictionary for simulation of device-level transients

Gwan S. Choi, Ravishankar K Iyer, Daniel G. Saab

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a methodology for the simulation of massive number of device-level transient faults. Fault injection locations and the gates around those locations are extracted and evaluated with SPICE. The extracted sub-circuits are exercised exhaustively while fault-injections are performed. Faulty behavior at the outputs of each sub-circuit is recorded in a dictionary, along with the associated input vector, fault-injection time, and location. The recorded logical errors are injected concurrently at run-time on the target design. A concurrent transient simulator is developed to allow simultaneous evaluation of a massive number of fault-injections, in a single simulation pass. The methodology is illustrated by a case study of MC68000 microprocessor.

Original languageEnglish (US)
Title of host publicationProc 1993 IEEE ACM Int Conf Comput Aided Des
Editors Anon
PublisherPubl by IEEE
Pages6-9
Number of pages4
ISBN (Print)0818644923
StatePublished - Dec 1 1993
EventProceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design - Santa Clara, CA, USA
Duration: Nov 7 1993Nov 11 1993

Publication series

NameProc 1993 IEEE ACM Int Conf Comput Aided Des

Other

OtherProceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design
CitySanta Clara, CA, USA
Period11/7/9311/11/93

ASJC Scopus subject areas

  • Engineering(all)

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