FastYield: Variation-aware, layout-driven simultaneous binding and module selection for performance yield optimization

Gregory Lucas, Scott Cromar, Deming Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

While technology scaling has presented many new and exciting opportunities, new design challenges have arisen due to increased density, and delay and power variations. High- level synthesis has been touted as a solution to these problems, as it can significantly reduce the number of man hours required for a design by raising the level of abstraction. In this paper, we propose a new variation-aware high-level synthesis binding/module selection algorithm, named FastYield, which takes into consideration multiplexers, functional units, registers, and interconnects. Additionally, FastYield connects with the lower levels of the design hierarchy through its inclusion of a timing driven floorplanner guided by a statistical static timing analysis(SSTA) engine which is used to modify/enhance the synthesis solution. FastYield is able to incorporate spatial correlations of process variations in its optimization, which are shown to affect performance yield. On average, FastYield achieves a clock period that is 14.5% smaller, and a performance yield gain of 78.9%, when compared to a variation-unaware algorithm. By making use of accurate timing information, FastYield's rebind- ing improves performance yield by an average of 9.8% over the initial binding, for the same clock period. To the best of our knowledge, this is the first high-level synthesis binding/module selection algorithm that is layout-driven and variation aware.

Original languageEnglish (US)
Title of host publicationProceedings of the ASP-DAC 2009
Subtitle of host publicationAsia and South Pacific Design Automation Conference 2009
Pages61-66
Number of pages6
DOIs
StatePublished - Apr 20 2009
EventAsia and South Pacific Design Automation Conference 2009, ASP-DAC 2009 - Yokohama, Japan
Duration: Jan 19 2009Jan 22 2009

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

OtherAsia and South Pacific Design Automation Conference 2009, ASP-DAC 2009
CountryJapan
CityYokohama
Period1/19/091/22/09

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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    Lucas, G., Cromar, S., & Chen, D. (2009). FastYield: Variation-aware, layout-driven simultaneous binding and module selection for performance yield optimization. In Proceedings of the ASP-DAC 2009: Asia and South Pacific Design Automation Conference 2009 (pp. 61-66). [4796442] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2009.4796442