TY - GEN
T1 - Fast eye diagram analysis for high-speed CMOS circuits
AU - Ahmadyan, Seyed Nematollah
AU - Gu, Chenjie
AU - Natarajan, Suriyaprakash
AU - Chiprout, Eli
AU - Vasudevan, Shobha
PY - 2015/4/22
Y1 - 2015/4/22
N2 - We present an efficient technique for analyzing eye diagrams of high speed CMOS circuits in the presence of non-idealities like noise and jitter. Our method involves geometric manipulations of the eye diagram topology to find area within the eye contours. We introduce random tree based simulations as an approach to computing the desired area. We typically show 20× speedup in generating the eye diagram as compared to the state-of-the-art Monte Carlo simulation based eye diagram analysis. For the same number of samples, Monte Carlo produces an eye diagram that is 8.51% smaller than the ideal eye diagram. We generate an eye diagram that is 53.52% smaller than the ideal eye, showing a 47% improvement in quality.
AB - We present an efficient technique for analyzing eye diagrams of high speed CMOS circuits in the presence of non-idealities like noise and jitter. Our method involves geometric manipulations of the eye diagram topology to find area within the eye contours. We introduce random tree based simulations as an approach to computing the desired area. We typically show 20× speedup in generating the eye diagram as compared to the state-of-the-art Monte Carlo simulation based eye diagram analysis. For the same number of samples, Monte Carlo produces an eye diagram that is 8.51% smaller than the ideal eye diagram. We generate an eye diagram that is 53.52% smaller than the ideal eye, showing a 47% improvement in quality.
KW - Eye diagram analysis
KW - Nonlinear analog circuits
KW - Random tree optimization
KW - Signal Integrity
UR - http://www.scopus.com/inward/record.url?scp=84945960996&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84945960996&partnerID=8YFLogxK
U2 - 10.7873/date.2015.0463
DO - 10.7873/date.2015.0463
M3 - Conference contribution
AN - SCOPUS:84945960996
T3 - Proceedings -Design, Automation and Test in Europe, DATE
SP - 1377
EP - 1382
BT - Proceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015
Y2 - 9 March 2015 through 13 March 2015
ER -