ExTensor: An accelerator for sparse tensor algebra

Kartik Hegde, Hadi Asghari-Moghaddam, Michael Pellauer, Neal Crago, Aamer Jaleel, Edgar Solomonik, Joel Emer, Christopher W. Fletcher

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Generalized tensor algebra is a prime candidate for acceleration via customized ASICs. Modern tensors feature a wide range of data sparsity, with the density of non-zero elements ranging from 10-6% to 50%. This paper proposes a novel approach to accelerate tensor kernels based on the principle of hierarchical elimination of computation in the presence of sparsity. This approach relies on rapidly inding intersectionsDsituations where both operands of a multiplication are non-zeroDenabling new data fetching mechanisms and avoiding memory latency overheads associated with sparse kernels implemented in software. We propose the ExTensor accelerator, which builds these novel ideas on handling sparsity into hardware to enable better bandwidth utilization and compute throughput. We evaluate ExTensor on several kernels relative to industry libraries (Intel MKL) and state-of-the-art tensor algebra compilers (TACO). When bandwidth normalized, we demonstrate an average speedup of 3.4, 1.3, 2.8, 24.9, and 2.7 on SpMSpM, SpMM, TTV, TTM, and SDDMM kernels respectively over a server class CPU.

Original languageEnglish (US)
Title of host publicationMICRO 2019 - 52nd Annual IEEE/ACM International Symposium on Microarchitecture, Proceedings
PublisherIEEE Computer Society
Pages319-333
Number of pages15
ISBN (Electronic)9781450369381
DOIs
StatePublished - Oct 12 2019
Externally publishedYes
Event52nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2019 - Columbus, United States
Duration: Oct 12 2019Oct 16 2019

Publication series

NameProceedings of the Annual International Symposium on Microarchitecture, MICRO
ISSN (Print)1072-4451

Conference

Conference52nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2019
CountryUnited States
CityColumbus
Period10/12/1910/16/19

Keywords

  • Hardware acceleration
  • Sparse computation
  • Tensor algebra

ASJC Scopus subject areas

  • Hardware and Architecture

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  • Cite this

    Hegde, K., Asghari-Moghaddam, H., Pellauer, M., Crago, N., Jaleel, A., Solomonik, E., Emer, J., & Fletcher, C. W. (2019). ExTensor: An accelerator for sparse tensor algebra. In MICRO 2019 - 52nd Annual IEEE/ACM International Symposium on Microarchitecture, Proceedings (pp. 319-333). (Proceedings of the Annual International Symposium on Microarchitecture, MICRO). IEEE Computer Society. https://doi.org/10.1145/3352460.3358275