Extensions of the latency insertion method (LIM) to DC analysis of power supply networks and modeling of circuit interconnects with frequency-dependent parameters

Dmitri Klokotov, José Schutt-Ainé

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, a fast circuit simulation technique based on the Latency Insertion Method (LIM) is proposed for the steady-state analysis of large-scale networks, such as on-chip power grids. The proposed method is shown to be very efficient for modeling of networks with very large numbers of nodes. The comparison with one of the best methods used for the power grid analysis today, the Random-Walk algorithm, shows that LIM is almost two orders of magnitude faster. Also, an extension of the LIM method to the treatment of interconnects with frequency-dependent parameters is proposed.

Original languageEnglish (US)
Title of host publication2009 Proceedings 59th Electronic Components and Technology Conference, ECTC 2009
Pages1624-1629
Number of pages6
DOIs
StatePublished - 2009
Event2009 59th Electronic Components and Technology Conference, ECTC 2009 - San Diego, CA, United States
Duration: May 26 2009May 29 2009

Publication series

NameProceedings - Electronic Components and Technology Conference
ISSN (Print)0569-5503

Other

Other2009 59th Electronic Components and Technology Conference, ECTC 2009
Country/TerritoryUnited States
CitySan Diego, CA
Period5/26/095/29/09

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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