Exploiting structural duplication for lifetime reliability enhancement

Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Increased power densities (and resultant temperatures) and other effects of device scaling are predicted to cause significant lifetime reliability problems in the near future. In this paper, we study two techniques that leverage micmarchitectural structural redundancy for lifetime reliability enhancement. First, in structural duplication (SD), redundant microarchitectural structures are added to the processor and designated as spares. Spare structures can be turned on when the original structure fails, increasing the processor's lifetime. Second, graceful performance degradation (GPD) is a technique which exploits existing microarchitectura! redundancy for reliability. Redundant structures that fail are shut down while still maintaining functionality, thereby increasing the processor's lifetime, but at a lower performance. Our analysis shows that exploiting structural redundancy can provide significant reliability benefits, and we present guidelines for efficient usage of these techniques by identifying situations where each is more beneficial. We show that GPD is the superior technique when only limited performance or cost resources can be sacrificed for reliability. Specifically, on average for our systems and applications, GPD increased processor reliability to 1.42 times the base value for less than a 5% loss in performance. On the other hand, for systems where reliability is more important than performance or cost, SD is more beneficial. SD increases reliability to 3.17 times the base value for 2.25 times the base cost, for our applications. Finally, a combination of the two techniques (SD+GPD) provides the highest reliability benefit.

Original languageEnglish (US)
Title of host publicationProceedings - 32nd International Symposium on Computer Architecture, ISCA 2005
Number of pages12
StatePublished - 2005
Event32nd Interntional Symposium on Computer Architecture, ISCA 2005 - Madison, WI, United States
Duration: Jun 4 2005Jun 8 2005

Publication series

NameProceedings - International Symposium on Computer Architecture
ISSN (Print)1063-6897


Other32nd Interntional Symposium on Computer Architecture, ISCA 2005
Country/TerritoryUnited States
CityMadison, WI

ASJC Scopus subject areas

  • General Engineering


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