TY - GEN
T1 - Evaluating thread placement based on memory access patterns for multi-core processors
AU - Diener, Matthias
AU - Schneider, Jörg
AU - Heiß, Hans Ulrich
AU - Madruga, Felipe L.
AU - Rodrigues, Eduardo R.
AU - Alves, Marco A.Z.
AU - Navaux, Philippe O.A.
PY - 2010
Y1 - 2010
N2 - Process placement is a technique widely used on parallel machines with heterogeneous interconnects to reduce the overall communication time. For instance, two processes which communicate frequently are mapped close to each other. Finding the optimal mapping between threads and cores in a shared-memory environment (for example, OpenMP and Pthreads) is an even more complex task due to implicit communication. In this work, we examine data sharing patterns between threads in different workloads and use those patterns in a similar way as messages are used to map processes in cluster computers. We evaluated our technique on a state-of-the-art multicore processor and achieved moderate improvements in the common case and considerable improvements in some cases, reducing execution time by up to 45%.
AB - Process placement is a technique widely used on parallel machines with heterogeneous interconnects to reduce the overall communication time. For instance, two processes which communicate frequently are mapped close to each other. Finding the optimal mapping between threads and cores in a shared-memory environment (for example, OpenMP and Pthreads) is an even more complex task due to implicit communication. In this work, we examine data sharing patterns between threads in different workloads and use those patterns in a similar way as messages are used to map processes in cluster computers. We evaluated our technique on a state-of-the-art multicore processor and achieved moderate improvements in the common case and considerable improvements in some cases, reducing execution time by up to 45%.
KW - Memory access patterns
KW - Multi-core processor
KW - Process mapping
KW - Shared cache
KW - Thread placement
UR - http://www.scopus.com/inward/record.url?scp=78149307313&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=78149307313&partnerID=8YFLogxK
U2 - 10.1109/HPCC.2010.114
DO - 10.1109/HPCC.2010.114
M3 - Conference contribution
AN - SCOPUS:78149307313
SN - 9780769542140
T3 - Proceedings - 2010 12th IEEE International Conference on High Performance Computing and Communications, HPCC 2010
SP - 491
EP - 496
BT - Proceedings - 2010 12th IEEE International Conference on High Performance Computing and Communications, HPCC 2010
T2 - 2010 12th IEEE International Conference on High Performance Computing and Communications, HPCC 2010
Y2 - 1 September 2010 through 3 September 2010
ER -