Evaluating Performance of Spintronics-Based Spiking Neural Network Chips using Parallel Discrete Event Simulation

Elkin Cruz-Camacho, Siyuan Qian, Ankit Shukla, Neil McGlohon, Shaloo Rakheja, Christopher D. Carothers

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

It has long been said that neuromorphic computing will yield enormous energy improvements on machine learning based computations and will be part of the next computing revolution. Yet, how likely is it that these goals are met once hardware-level constraints have been accounted for? In this paper, we benchmark the performance of a spintronics hardware platform designed for handling neuromorphic tasks. Spintronics devices that use the spin of electrons as the information state variable have the potential to emulate neuro-synaptic dynamics in hardware. Unlike their CMOS counterparts, spintronics-based neurons and synapses can be realized within a compact form-factor, while operating at ultra-low energy-delay point. To explore the benefits of spintronics-based hardware on realistic neuromorphic workloads, we developed a Parallel Discrete-Event Simulation model called Doryta, which is further integrated with a materials-To-systems benchmarking framework. The benchmarking framework allows us to obtain quantitative metrics on the throughput and energy of spintronics-based neuromorphic computing and compare these against standard CMOS-based approaches. Although spintronics hardware offers significant energy and latency advantages, we find that for larger neuromorphic circuits, the performance is evidently limited by the interconnection networks rather than the spintronics-based neurons and synapses. Thus, it becomes imperative to identify interconnect materials that would natively offer low latency and consume less energy than the current copper-based interconnects. Through Doryta we are also able to show the power of neuromorphic computing by simulating Conway's Game of Life. We show that Doryta obtains over 400 × speedup using 1,280 CPU cores when tested on a convolutional, sparse, neural architecture.

Original languageEnglish (US)
Title of host publicationProceedings of the 2022 ACM SIGSIM International Conference on Principles of Advanced Discrete Simulation, ACM SIGSIM PADS 2022
PublisherAssociation for Computing Machinery
Pages69-80
Number of pages12
ISBN (Electronic)9781450392617
DOIs
StatePublished - Jun 8 2022
Event2022 ACM SIGSIM International Conference on Principles of Advanced Discrete Simulation, SIGSIM PADS 2022 - Virtual, Online, United States
Duration: Jun 8 2022Jun 10 2022

Publication series

NameACM International Conference Proceeding Series

Conference

Conference2022 ACM SIGSIM International Conference on Principles of Advanced Discrete Simulation, SIGSIM PADS 2022
Country/TerritoryUnited States
CityVirtual, Online
Period6/8/226/10/22

Keywords

  • chip performance
  • energy estimation
  • game of life
  • parallel discrete event simulation
  • spiking neural networks
  • spintronic devices
  • turing completness

ASJC Scopus subject areas

  • Human-Computer Interaction
  • Computer Networks and Communications
  • Computer Vision and Pattern Recognition
  • Software

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