EVAL: Utilizing processors with variation-induced timing errors

Smruti Sarangi, Brian Greskamp, Abhishek Tiwari, Josep Torrellas

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Parameter variation in integrated circuits causes sections of a chip to be slower than others. If, to prevent any resulting timing errors, we design processors for worst-case parameter values, we may lose substantial performance. An alternate approach explored in this paper is to design for closer to nominal values, and provide some transistor budget to tolerate unavoidable variation-induced errors. To assess this approach, this paper first presents a novel framework that shows how microarchitecture techniques can trade off variation-induced errors for power and processor frequency. Then, the paper introduces an effective technique to maximize performance and minimize power in the presence of variation-induced errors, namely High-Dimensional dynamic adaptation. For efficiency, the technique is implemented using a machine-learning algorithm. The results show that our best configuration increases processor frequency by 56% on average, allowing the processor to cycle 21% faster than without variation. Processor performance increases by 40% on average, resulting in a performance that is 14% higher than without variation - at only a 10.6% area cost.

Original languageEnglish (US)
Title of host publication2008 Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-41
Pages423-434
Number of pages12
Edition2008 PROCEEDINGS
DOIs
StatePublished - Dec 1 2008
Event2008 - 41st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-41 - Lake Como, Italy
Duration: Nov 8 2008Nov 12 2008

Publication series

NameProceedings of the Annual International Symposium on Microarchitecture, MICRO
Number2008 PROCEEDINGS
ISSN (Print)1072-4451

Other

Other2008 - 41st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-41
Country/TerritoryItaly
CityLake Como
Period11/8/0811/12/08

ASJC Scopus subject areas

  • Hardware and Architecture

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