ESD self-protection of high-speed transceivers using adaptive active bias conditioning

Adaptive active bias conditioning (AABC) is proposed for high-speed inputs/outputs (I/O) to mitigate the tradeoff between bandwidth and electrostatic discharge (ESD) reliability. During a component-level ESD event, the I/O transistors' gate voltages are adaptively set to the values that maximize ESD robustness based on the ESD polarity. The AABC technique has no deleterious effect on signal integrity or power consumption, because its circuitry is located off the high-speed signal path and activated only during ESD. The efficacy of the protection scheme is validated on a 130-nm complementary metal-oxide semiconductor test chip. Thirty percent improved ESD resiliency is found from the charged device model and very-fast transmission line pulsing tests with only 10% area overhead, relative to a transceiver with the same I/O protection and no AABC. In order to diagnose ESD-induced failures, a new failure analysis method, which utilizes power-on I-V curves, is introduced. Using this method, the failed device can be inferred without the use of any destructive, physical failure analysis techniques.