Error-resilient low-power viterbi decoders via state clustering

Keyphrases

• Low Power 100%
• Error Resilience 100%
• Viterbi Decoder 100%
• State Clustering 100%
• Supply Voltage 66%
• Voltage Limit 66%
• Timing Error 33%
• Efficient Estimator 33%
• Process Variation 33%
• Data Dependency 33%
• Error Correction 33%
• Architecture-centric 33%
• Average-case 33%
• Power Saving 33%
• CMOS Process 33%
• Power Reduction 33%
• Overscaling 33%
• Process Corners 33%
• Algorithmic Noise Tolerance 33%
• Coding Gain 33%
• Encoder-decoder Architecture 33%
• Add-compare-select 33%

Engineering

• Supply Voltage 100%
• Error Correction 50%
• Efficient Estimator 50%
• Error Resiliency 50%
• Critical Path 50%
• Noise Tolerance 50%
• Coding Gain 50%
• Process Variation 50%