An experimental study of error propagation from the gate to the pin level is described. The target system is the CPU in the Bendix BDX-930, a digital avionic miniprocessor. Error activity data for the study were collected via a gate-level simulation. A family of distributions was then generated to characterize the error propagation, both within the chip and at the pins. On the basis of these distributions, measures of error propagation and severity were defined. The analysis quantifies the dependency of the measured error propagation on the location of the fault and the type of instruction/microinstruction executed. The importance of these results in the design and validation of fault-tolerant systems is discussed.
|Original language||English (US)|
|Title of host publication||Unknown Host Publication Title|
|Number of pages||8|
|State||Published - 1986|
ASJC Scopus subject areas