Equalizers for high-speed serial links

Pavan Kumar Hanumolu, Gu Yeon Wei, Un Ku Moon

Research output: Chapter in Book/Report/Conference proceedingChapter


In this tutorial paper we present equalization techniques to mitigate inter-symbol interference (ISI) in high-speed communication links. Both transmit and receive equalizers are analyzed and high-speed circuits implementing them are presented. It is shown that a digital transmit equalizer is the simplest to design, while a continuous-time receive equalizer generally provides better performance. Decision feedback equalizer (DFE) is described and the loop latency problem is addressed. Finally, techniques to set the equalizer parameters adaptively are presented.

Original languageEnglish (US)
Title of host publicationDesign Of High-speed Communication Circuits
PublisherWorld Scientific Publishing Co.
Number of pages30
ISBN (Electronic)9789812774583
StatePublished - Jan 1 2006
Externally publishedYes


  • BER
  • DFE
  • Equalizer
  • Eye Diagram
  • ISI
  • Jitter
  • Noise
  • Pre-emphasis
  • Serial Link
  • Transceiver

ASJC Scopus subject areas

  • General Engineering


Dive into the research topics of 'Equalizers for high-speed serial links'. Together they form a unique fingerprint.

Cite this