Equalizers for high-speed serial links

Pavan Kumar Hanumolu, Gu Yeon Wei, Yu Ku Moon

Research output: Contribution to journalArticle

Abstract

In this tutorial paper we present equalization techniques to mitigate inter-symbol interference (ISI) in high-speed communication links. Both transmit and receive equalizers are analyzed and high-speed circuits implementing them are presented. It is shown that a digital transmit equalizer is the simplest to design, while a continuous-time receive equalizer generally provides better performance. Decision feedback equalizer (DFE) is described and the loop latency problem is addressed. Finally, techniques to set the equalizer parameters adaptively are presented.

Original languageEnglish (US)
Pages (from-to)429-458
Number of pages30
JournalInternational Journal of High Speed Electronics and Systems
Volume15
Issue number2
DOIs
StatePublished - Jun 1 2005
Externally publishedYes

Keywords

  • BER
  • DFE
  • Equalizer
  • Eye Diagram
  • ISI
  • Jitter
  • Noise
  • Pre-emphasis
  • Serial Link
  • Transceiver

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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