Abstract
A process that enables the formation of III-V photonic devices on CMOS-compatible silicon for the integration of a photonic logic system is demonstrated. III-V epitaxial structures are assembled on a silicon carrier wafer using commercially available temporary-bonding polymers, allowing for the distribution of distinct materials suitable for fabricating a photonic device network. These epitaxial layers are etched into precisely located geometric islands that can align with features in a CMOS-compatible host wafer. Epitaxial transfer then unites this array of islands onto the host wafer permanently by a metal-assisted eutectic bonding process. This process is shown with GaAs wafers to demonstrate the scalable formation of heterogeneous material layouts using a single epitaxial transfer such that fine alignment of devices can be constructed from the transferred III-V islands in unison.
Original language | English (US) |
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State | Published - 2018 |
Event | 2018 International Conference on Compound Semiconductor Manufacturing Technology, CS MANTECH 2018 - Austin, United States Duration: May 7 2018 → May 10 2018 |
Other
Other | 2018 International Conference on Compound Semiconductor Manufacturing Technology, CS MANTECH 2018 |
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Country/Territory | United States |
City | Austin |
Period | 5/7/18 → 5/10/18 |
Keywords
- Epitaxial Transfer
- Heterogeneous Integration
- Photonic Logic
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering