Enhancing the Accuracy of Resistive In-Memory Architectures using Adaptive Signal Processing

Research output: Contribution to journalConference articlepeer-review

Abstract

Analog in-memory computing architectures (IMCs) have exhibited high energy efficiency over conventional digital architectures. The use of resistive memory arrays such as magnetic RAM (MRAM) in IMCs has significant potential due to their high-density and non-volatility. However, the analog nature of computation limits the compute accuracy of IMCs. We present activation scaling compensation (ASC), an adaptive signal processing method to compensate for the effects of bitline (BL) and sourceline (SL) parasitic resistances in MRAM-based IMC matrix-vector multiplication (MVM) architectures. Through behavioral modeling and simulation, we demonstrate that ASC enhances the compute signal-to-noise ratio (SNR) by 8.6dB-to-13.9dB with negligible energy overhead. The effectiveness of ASC-enabled MRAM-based IMC is demonstrated in the context of a signal recovery problem.

Keywords

  • MRAM
  • digital signal processing
  • error compensation
  • in-memory computing architectures
  • nonvolatile memory

ASJC Scopus subject areas

  • Software
  • Signal Processing
  • Electrical and Electronic Engineering

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