Enhancement-mode high electron mobility transistors lattice-matched to InP substrates utilizing Ti/Pt/Au metallization

Jae Hyung Jang, Seiyon Kim, Ilesanmi Adesida

Research output: Contribution to journalArticle

Abstract

Enhancement-mode high electron mobility transistors (EHEMTs) were fabricated on In0.52Al0.48As/In0.53Ga 0.47As heterostructures lattice-matched to InP substrates. Vertical scaling of device heterostructures was carried out to realize a positive threshold voltage with Ti/Pt/Au gates. Submicron EHEMTs utilizing Ti/R/Au were fabricated and their performances were compared with those of conventional EHEMTs with buried-Pt gates. DC I-V characteristics of both devices exhibited excellent pinch-off characteristics and very low output conductance. Output conductance measured for both devices showed that EHEMTs exhibit smaller kink effects than normal depletion-mode HEMTs (DHEMTs) due to the operating mode of EHEMTs with forward gate bias. EHEMTs with 0.18 μm Ti/Pt/Au gates exhibited a threshold voltage of 100 mV, peak transconductance of 810 mS/mm, and unity current-gain cut-off frequency (fT) of 150 GHz, while those with buried-Pt gates exhibited a threshold voltage of 300 mV, peak transconductance of 880 mS/mm, and unity current-gain cut-off frequency (fT) of 100 GHz. Studies on the thermal stabilities of the two types of gate metallization have been carried out. The Ti/Pt/Au gates exhibited better thermal stability than Pt/Ti/Pt/Au gates in terms of variation of threshold voltages and maximum transconductance values at elevated temperatures.

Original languageEnglish (US)
Pages (from-to)3349-3354
Number of pages6
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume45
Issue number4 B
DOIs
StatePublished - Apr 25 2006

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Keywords

  • EHEMTs
  • High electron mobility transistors
  • InGaAs
  • InP

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

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