Energy/performance design of memory hierarchies for processor-in-memory chips

Michael Huang; Jose Renau; Seung Moon Yoo; Josep Torrellas

doi:10.1007/3-540-44570-6_11

Energy/performance design of memory hierarchies for processor-in-memory chips

Michael Huang, Jose Renau, Seung Moon Yoo, Josep Torrellas

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English (US)
Title of host publication	Intelligent Memory Systems - 2nd International Workshop, IMS 2000, Revised Papers
Editors	Frederic T. Chong, Mark Oskin, Christoforos Kozyrakis
Publisher	Springer
Pages	152-159
Number of pages	8
ISBN (Print)	3540424067, 9783540423287
DOIs	https://doi.org/10.1007/3-540-44570-6_11
State	Published - 2001
Event	2nd International Workshop on Intelligent Memory Systems, IMS 2000 - Cambridge, United States Duration: Nov 12 2000 → Nov 12 2000

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	2107
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Other

Other	2nd International Workshop on Intelligent Memory Systems, IMS 2000
Country/Territory	United States
City	Cambridge
Period	11/12/00 → 11/12/00

ASJC Scopus subject areas

Theoretical Computer Science
General Computer Science

Online availability

10.1007/3-540-44570-6_11

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Huang, M., Renau, J., Yoo, S. M., & Torrellas, J. (2001). Energy/performance design of memory hierarchies for processor-in-memory chips. In F. T. Chong, M. Oskin, & C. Kozyrakis (Eds.), Intelligent Memory Systems - 2nd International Workshop, IMS 2000, Revised Papers (pp. 152-159). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 2107). Springer. https://doi.org/10.1007/3-540-44570-6_11

Energy/performance design of memory hierarchies for processor-in-memory chips. / Huang, Michael; Renau, Jose; Yoo, Seung Moon et al.
Intelligent Memory Systems - 2nd International Workshop, IMS 2000, Revised Papers. ed. / Frederic T. Chong; Mark Oskin; Christoforos Kozyrakis. Springer, 2001. p. 152-159 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 2107).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Huang, M, Renau, J, Yoo, SM & Torrellas, J 2001, Energy/performance design of memory hierarchies for processor-in-memory chips. in FT Chong, M Oskin & C Kozyrakis (eds), Intelligent Memory Systems - 2nd International Workshop, IMS 2000, Revised Papers. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 2107, Springer, pp. 152-159, 2nd International Workshop on Intelligent Memory Systems, IMS 2000, Cambridge, United States, 11/12/00. https://doi.org/10.1007/3-540-44570-6_11

Huang M, Renau J, Yoo SM, Torrellas J. Energy/performance design of memory hierarchies for processor-in-memory chips. In Chong FT, Oskin M, Kozyrakis C, editors, Intelligent Memory Systems - 2nd International Workshop, IMS 2000, Revised Papers. Springer. 2001. p. 152-159. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/3-540-44570-6_11

Huang, Michael ; Renau, Jose ; Yoo, Seung Moon et al. / Energy/performance design of memory hierarchies for processor-in-memory chips. Intelligent Memory Systems - 2nd International Workshop, IMS 2000, Revised Papers. editor / Frederic T. Chong ; Mark Oskin ; Christoforos Kozyrakis. Springer, 2001. pp. 152-159 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

@inproceedings{7de7e27f38404a6a86f73036d3450cba,

title = "Energy/performance design of memory hierarchies for processor-in-memory chips",

author = "Michael Huang and Jose Renau and Yoo, {Seung Moon} and Josep Torrellas",

year = "2001",

doi = "10.1007/3-540-44570-6_11",

language = "English (US)",

isbn = "3540424067",

series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

publisher = "Springer",

pages = "152--159",

editor = "Chong, {Frederic T.} and Mark Oskin and Christoforos Kozyrakis",

booktitle = "Intelligent Memory Systems - 2nd International Workshop, IMS 2000, Revised Papers",

address = "Germany",

note = "2nd International Workshop on Intelligent Memory Systems, IMS 2000 ; Conference date: 12-11-2000 Through 12-11-2000",

}

TY - GEN

T1 - Energy/performance design of memory hierarchies for processor-in-memory chips

AU - Huang, Michael

AU - Renau, Jose

AU - Yoo, Seung Moon

AU - Torrellas, Josep

PY - 2001

Y1 - 2001

UR - http://www.scopus.com/inward/record.url?scp=84872077062&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84872077062&partnerID=8YFLogxK

U2 - 10.1007/3-540-44570-6_11

DO - 10.1007/3-540-44570-6_11

M3 - Conference contribution

AN - SCOPUS:84872077062

SN - 3540424067

SN - 9783540423287

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 152

EP - 159

BT - Intelligent Memory Systems - 2nd International Workshop, IMS 2000, Revised Papers

A2 - Chong, Frederic T.

A2 - Oskin, Mark

A2 - Kozyrakis, Christoforos

PB - Springer

T2 - 2nd International Workshop on Intelligent Memory Systems, IMS 2000

Y2 - 12 November 2000 through 12 November 2000

ER -

Energy/performance design of memory hierarchies for processor-in-memory chips

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