Energy-performance tradeoffs in processor architecture and circuit design: A marginal cost analysis

Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay Jeram Patel, Mark Horowitz

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance tradeoffs in all aspects of the processor design space, including both architectural and circuit design choices. In this paper, we apply an integrated architecture-circuit optimization framework to map out energy-performance trade-offs of several different high-level processor architectures. We show how the joint architecture-circuit space provides a trade-off range of approximately 6.5× in performance for 4× energy, and we identify the optimal architectures for different design objectives. We then show that many of the designs in this space come at very high marginal costs. Our results show that, for a large range of design objectives, voltage scaling is effective in efficiently trading off performance and energy, and that the choice of optimal architecture and circuits does not change much during voltage scaling. Finally, we show that with only two designs-a dual-issue in-order design and a dual-issue out-of-order design, both properly optimized-a large part of the energy-performance trade-off space can be covered within 3% of the optimal energy-efficiency.

Original languageEnglish (US)
Title of host publicationISCA 2010 - The 37th Annual International Symposium on Computer Architecture, Conference Proceedings
Number of pages11
StatePublished - 2010
Event37th International Symposium on Computer Architecture, ISCA 2010 - Saint-Malo, France
Duration: Jun 19 2010Jun 23 2010

Publication series

NameProceedings - International Symposium on Computer Architecture
ISSN (Print)1063-6897


Other37th International Symposium on Computer Architecture, ISCA 2010


  • Co-optimization
  • Design space exploration
  • Design trade-offs
  • Energy efficiency
  • Microarchitecture
  • Optimization

ASJC Scopus subject areas

  • Hardware and Architecture


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