Energy-efficient thread-level speculation

Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti R. Sarangi, James Tuck, Josep Torrellas

Research output: Contribution to journalArticlepeer-review

Abstract

Chip multiprocessors with thread-level speculation have become the subject of intense research. This work refutes the claim that such a design is necessarily too energy inefficient. In addition, it proposes out-of-order task spawning to exploit more sources of speculative task-level parallelism.

Original languageEnglish (US)
Pages (from-to)80-91
Number of pages12
JournalIEEE Micro
Volume26
Issue number1
DOIs
StatePublished - Jan 2006

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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