Abstract
Chip multiprocessors with thread-level speculation have become the subject of intense research. This work refutes the claim that such a design is necessarily too energy inefficient. In addition, it proposes out-of-order task spawning to exploit more sources of speculative task-level parallelism.
Original language | English (US) |
---|---|
Pages (from-to) | 80-91 |
Number of pages | 12 |
Journal | IEEE Micro |
Volume | 26 |
Issue number | 1 |
DOIs | |
State | Published - Jan 2006 |
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering