TY - JOUR
T1 - Energy-efficient soft error-tolerant digital signal processing
AU - Shim, Byonghyo
AU - Shanbhag, Naresh R.
N1 - Funding Information:
Manuscript received January 17, 2005; revised September 28, 2005. This work was supported in part by the Microelectronics Advanced Research Corporation (MARCO) sponsored by the Gigascale System Research Center and in part by the National Science Foundation under Grant CCR 99-79381 and Grant CCR 00-85929.
PY - 2006/4
Y1 - 2006/4
N2 - In this paper, we present energy-efficient soft error-tolerant techniques for digital signal processing (DSP) systems. The proposed technique, referred to as algorithmic soft error-tolerance (ASET), employs low-complexity estimators of a main DSP block to achieve reliable operation in the presence of soft errors. Three distinct ASET techniques-spatial, temporal and spatio-temporal-are presented. For frequency selective finite-impulse response (FIR) filtering, it is shown that the proposed techniques provide robustness in the presence of soft error rates of up to P er = 10 -2 and P er = 10 -3 in a single-event upset scenario. The power dissipation of the proposed techniques ranges from 1.1 X to 1.7 X (spatial ASET) and 1.05 X to 1.17 X (spatio-temporal and temporal ASET) when the desired signal-to-noise ratio SNR des = 25 dB. In comparison, the power dissipation of the commonly employed triple modular redundancy technique is 2.9 X.
AB - In this paper, we present energy-efficient soft error-tolerant techniques for digital signal processing (DSP) systems. The proposed technique, referred to as algorithmic soft error-tolerance (ASET), employs low-complexity estimators of a main DSP block to achieve reliable operation in the presence of soft errors. Three distinct ASET techniques-spatial, temporal and spatio-temporal-are presented. For frequency selective finite-impulse response (FIR) filtering, it is shown that the proposed techniques provide robustness in the presence of soft error rates of up to P er = 10 -2 and P er = 10 -3 in a single-event upset scenario. The power dissipation of the proposed techniques ranges from 1.1 X to 1.7 X (spatial ASET) and 1.05 X to 1.17 X (spatio-temporal and temporal ASET) when the desired signal-to-noise ratio SNR des = 25 dB. In comparison, the power dissipation of the commonly employed triple modular redundancy technique is 2.9 X.
KW - Digital signal processing (DSP)
KW - Low-power
KW - Reduced precision redundancy (RPR)
KW - Reliability
KW - Soft error tolerance
KW - Triple modular redundancy (TMR)
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U2 - 10.1109/TVLSI.2006.874359
DO - 10.1109/TVLSI.2006.874359
M3 - Article
AN - SCOPUS:33746638860
SN - 1063-8210
VL - 14
SP - 336
EP - 348
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IS - 4
M1 - 1637464
ER -