Energy-efficient pixel-arithmetic

Syed Zohaib Gilani, Nam Sung Kim, Michael Schulte

Research output: Contribution to journalArticlepeer-review


With the advent of pervasive computing, the performance requirements of visual applications have increased significantly. On the other hand, the energy budget for future devices may decrease due to reduced form factors and thus smaller battery sizes. It is thus imperative to improve energy efficiency of visual applications to meet their stringent demands in energy-constrained devices. This paper presents a novel energy-efficient floating-point unit (E 2FPU) that dynamically detects multiplications in which at least one operand is an integer power of two or the sum of consecutive integer powers of two (POW2 operands) and executes them on the E2FPU. We show that POW2 operands are extremely common in visual applications. For non-POW2 operands, we propose dynamic approximation of suitable operands as the closest POW2 operand with the same exponent while ensuring a small and limited approximation error. Finally, we exploit the limited dynamic range of pixel values to enhance the E2FPU to support low-energy FP addition for a sub-set of the single-precision floating-point dynamic range. The proposed E2 FPU can reduce execution energy by 35 percent with a negligible impact on the peak signal to noise ratio. Overall, at the chip-level, our approaches yield a 12 percent dynamic energy reduction for a graphics processing unit (GPU).

Original languageEnglish (US)
Article number6819038
Pages (from-to)1882-1894
Number of pages13
JournalIEEE Transactions on Computers
Issue number8
StatePublished - Aug 1 2014
Externally publishedYes


  • Energy efficiency
  • approximation
  • computer arithmetic
  • graphics processing unit (GPU)
  • throughput processor

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics


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