@inproceedings{d49fdb6cd59641acb6fb40e6be9af332,
title = "Energy-efficient motion estimation using error-tolerance",
abstract = "Presented is an energy-efficient motion estimation architecture using error-tolerance. The technique employs overscaling of the supply voltage (voltage overscaling (VOS)) to reduce power at the expense of timing errors, which are then corrected using algorithmic noise-tolerance (ANT) techniques. Referred to as input subsampled replica ANT (ISR-ANT), the proposed technique incorporates an input subsampled replica of the main sum of absolute difference (MSAD) block for obtaining the motion vectors in the presence of errors induced by VOS. Simulations show that the proposed technique can save up to 60% power over an optimal error-free present day system in a 130nm CMOS technology. Power savings increase to 79% in a 45nm predictive process technology.",
keywords = "Low-power, Noise-tolerance",
author = "Varatkar, {Girish V.} and Shanbhag, {Naresh R.}",
year = "2006",
doi = "10.1145/1165573.1165599",
language = "English (US)",
isbn = "1595934626",
series = "Proceedings of the International Symposium on Low Power Electronics and Design",
pages = "113--118",
booktitle = "ISLPED'06 - Proceedings of the 2006 International Symposium on Low Power Electronics and Design",
note = "ISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design ; Conference date: 04-10-2006 Through 06-10-2006",
}