Energy-efficient floating-point arithmetic for software-defined radio architectures

Syed Zohaib Gilani, Nam Sung Kim, Michael Schulte

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The lack of hardware support for floating-point arithmetic in low-power software-defined radio architectures can significantly increase their software design time due to a time-consuming process of converting floating-point code to fixed-point code. Moreover, emerging wireless communication protocols involve several matrix based algorithms that are extremely sensitive to round-off errors in computations. Using fixed-point arithmetic for these algorithms can significantly impact the accuracy of algorithm results and may incur additional energy overhead due to the extra instructions required for fixed-point arithmetic. In this paper, we demonstrate that supporting floating-point arithmetic in hardware can deliver nearly 30% higher performance and energy efficiency than supporting only fixed-point arithmetic for key kernels of modern wireless communication protocols. The improvements can be further enhanced by our proposed high-throughput floating-point fused-multiply-add unit. Applying our proposed fused-multiply-add unit to key kernels improves performance of the baseline floating-point unit by as much as 60%, while reducing energy consumption by 30% and area by 33%. Although our approach may cause execution stalls depending on data, we show the performance impact of these stalls is negligible. We also employ dynamic range-based dynamic voltage and frequency scaling to further reduce the energy consumption of the processor by 25% for the same worst-case performance as the baseline floating-point implementation.

Original languageEnglish (US)
Title of host publicationProceedings - 22nd IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2011
Pages122-129
Number of pages8
DOIs
StatePublished - Nov 3 2011
Event22nd IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2011 - Santa Monica, CA, United States
Duration: Sep 11 2011Sep 14 2011

Publication series

NameProceedings of the International Conference on Application-Specific Systems, Architectures and Processors
ISSN (Print)1063-6862

Other

Other22nd IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2011
CountryUnited States
CitySanta Monica, CA
Period9/11/119/14/11

Keywords

  • energy efficiency
  • floating-point arithmetic
  • software-defined radio

ASJC Scopus subject areas

  • Hardware and Architecture
  • Computer Networks and Communications

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  • Cite this

    Gilani, S. Z., Kim, N. S., & Schulte, M. (2011). Energy-efficient floating-point arithmetic for software-defined radio architectures. In Proceedings - 22nd IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2011 (pp. 122-129). [6043260] (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors). https://doi.org/10.1109/ASAP.2011.6043260