Energy-efficient and metastability-immune resilient circuits for dynamic variation tolerance

Keith A. Bowman, James W. Tschanz, Nam Sung Kim, Janice C. Lee, Chris B. Wilkerson, Shih Lien L. Lu, Tanay Karnik, Vivek K. De

Research output: Contribution to journalArticlepeer-review


A 65 nm resilient circuit test-chip is implemented with timing-error detection and recovery circuits to eliminate the clock frequency guardband from dynamic supply voltage $( V}- CC})$ and temperature variations as well as to exploit path-activation probabilities for maximizing throughput. Two error-detection sequential (EDS) circuits are introduced to preserve the timing-error detection capability of previous EDS designs while lowering clock energy and removing datapath metastability. One EDS circuit is a dynamic transition detector with a time-borrowing datapath latch (TDTB). The other EDS circuit is a double-sampling static design with a time-borrowing datapath latch (DSTB). In comparison to previous EDS designs, TDTB and DSTB redirect the highly complex metastability problem from both the datapath and error path to only the error path, enabling a drastic simplification in managing metastability. From a survey of various EDS circuit options, TDTB represents the lowest clock energy EDS circuit known; DSTB represents the lowest clock energy static-EDS circuit with SER protection known. Error-recovery circuits are introduced to replay failing instructions at lower clock frequency to guarantee correct functionality. Relative to conventional circuits, test-chip measurements demonstrate that resilient circuits enable either 25%32% throughput gain at equal $ V}- CC}$ or at least 17% $ V}- CC}$ reduction at equal throughput, corresponding to 31%37% total power reduction.

Original languageEnglish (US)
Article number4735558
Pages (from-to)49-63
Number of pages15
JournalIEEE Journal of Solid-State Circuits
Issue number1
StatePublished - Jan 2009
Externally publishedYes


  • Dynamic variations
  • Error correction
  • Error detection
  • Error recovery
  • Error-detection sequential
  • Instruction replay
  • Parameter variations
  • Resilient circuits
  • Resilient design
  • Supply voltage droop
  • Temperature variation
  • Timing errors
  • Variation tolerance

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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