TY - GEN
T1 - Embedded error compensation for energy efficient DSP systems
AU - Zhang, Sai
AU - Shanbhag, Naresh R.
N1 - Publisher Copyright:
© 2014 IEEE.
PY - 2014/2/5
Y1 - 2014/2/5
N2 - Algorithmic noise-tolerance (ANT) is an effective statistical error compensation (SEC) technique for designing energy-efficient digital signal processing systems. A conventional ANT system employs an explicit estimator block to compensate for the large magnitude errors in the main block. The estimator presents area and power overheads, as large as 40% of the main block, to the system. In this paper, we propose ARCH-ANT, an architectural level embedded algorithmic noise-tolerance technique. ARCH-ANT achieves the same error compensation functionality as the conventional ANT by embedding the estimator block into the main block. Such embedding eliminates the estimator block and thus improves the system energy efficiency. A general optimization framework is proposed to design ARCH-ANT systems. Simulation results show that when applied to a multiply-accumulate (MAC) unit, 15.9%∼69.4% and 59.2%-72.75% energy savings can be achieved by an 8 ×8 and 16 × 16 ARCH-ANT system, which is 5%∼21.6% more than that of conventional ANT system, with no increase in mean square error (MSE).
AB - Algorithmic noise-tolerance (ANT) is an effective statistical error compensation (SEC) technique for designing energy-efficient digital signal processing systems. A conventional ANT system employs an explicit estimator block to compensate for the large magnitude errors in the main block. The estimator presents area and power overheads, as large as 40% of the main block, to the system. In this paper, we propose ARCH-ANT, an architectural level embedded algorithmic noise-tolerance technique. ARCH-ANT achieves the same error compensation functionality as the conventional ANT by embedding the estimator block into the main block. Such embedding eliminates the estimator block and thus improves the system energy efficiency. A general optimization framework is proposed to design ARCH-ANT systems. Simulation results show that when applied to a multiply-accumulate (MAC) unit, 15.9%∼69.4% and 59.2%-72.75% energy savings can be achieved by an 8 ×8 and 16 × 16 ARCH-ANT system, which is 5%∼21.6% more than that of conventional ANT system, with no increase in mean square error (MSE).
UR - http://www.scopus.com/inward/record.url?scp=84949927833&partnerID=8YFLogxK
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U2 - 10.1109/GlobalSIP.2014.7032072
DO - 10.1109/GlobalSIP.2014.7032072
M3 - Conference contribution
AN - SCOPUS:84949927833
T3 - 2014 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2014
SP - 30
EP - 34
BT - 2014 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2014 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2014
Y2 - 3 December 2014 through 5 December 2014
ER -