TY - JOUR
T1 - Electrical-Thermal Cosimulation of Coaxial TSVs with Temperature-Dependent MOS Effect Using Equivalent Circuit Models
AU - Min, Qiu
AU - Li, Er Ping
AU - Jin, Jian Ming
AU - Chen, Wenchao
N1 - Manuscript received October 19, 2019; revised December 25, 2019; accepted February 4, 2020. Date of publication March 2, 2020; date of current version October 13, 2020. This work was supported in part by the National Natural Science Foundation of China under Grants 61371031, 61571395, and 61971375, and in part by the Fundamental Research Funds for the Central Universities under Grant 2017XZZX009, and in part by the ZJU-SUTD IDEA Grant. The work of Er-Ping Li, Jian-Ming Jin, and Wenchao Chen was supported by ZJU–UIUC Institute. (Corresponding author: Wenchao Chen.) Qiu Min, Er-Ping Li, and Wenchao Chen are with the Key Lab of Advanced Micro/Nano-Electronic Smart Systems and Applications, College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China (e-mail: [email protected]; [email protected]; [email protected]).
PY - 2020/10
Y1 - 2020/10
N2 - A coupled electrical-thermal cosimulation with consideration of the temperature dependence of the metal-oxide-semiconductor (MOS) effect is performed for coaxial through silicon vias (C-TSVs) by using equivalent electrical and thermal circuit models. In the equivalent electrical circuit (EEC) model, the dependence of the MOS capacitance on bias voltage, operation frequency, oxide charge density, and temperature is studied, and further verified by measurement results from a previous publication. A 3-D equivalent thermal circuit (ETC) model with lump components, including thermal resistance and thermal capacitance analytically calculated from the geometry and material parameters of C-TSVs, is proposed for transient thermal simulation. The accuracy of the EEC and ETC models is verified by comparisons with full-wave simulations. Transient electrical-thermal co-simulation is performed for the C-TSVs with the EEC and ETC models. Results reveal that the temperature dependence of depletion width and corresponding MOS capacitance leads to considerable variations in the S-parameters of C-TSVs.
AB - A coupled electrical-thermal cosimulation with consideration of the temperature dependence of the metal-oxide-semiconductor (MOS) effect is performed for coaxial through silicon vias (C-TSVs) by using equivalent electrical and thermal circuit models. In the equivalent electrical circuit (EEC) model, the dependence of the MOS capacitance on bias voltage, operation frequency, oxide charge density, and temperature is studied, and further verified by measurement results from a previous publication. A 3-D equivalent thermal circuit (ETC) model with lump components, including thermal resistance and thermal capacitance analytically calculated from the geometry and material parameters of C-TSVs, is proposed for transient thermal simulation. The accuracy of the EEC and ETC models is verified by comparisons with full-wave simulations. Transient electrical-thermal co-simulation is performed for the C-TSVs with the EEC and ETC models. Results reveal that the temperature dependence of depletion width and corresponding MOS capacitance leads to considerable variations in the S-parameters of C-TSVs.
KW - Coaxial through silicon via (C-TSV)
KW - S-parameters
KW - electrical-thermal cosimulation
KW - equivalent electrical circuit (EEC)
KW - equivalent thermal circuit (ETC)
KW - metal-oxide-semiconductor (MOS) effect
KW - temperature dependence
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U2 - 10.1109/TEMC.2020.2973811
DO - 10.1109/TEMC.2020.2973811
M3 - Article
AN - SCOPUS:85094211711
SN - 0018-9375
VL - 62
SP - 2247
EP - 2256
JO - IEEE Transactions on Electromagnetic Compatibility
JF - IEEE Transactions on Electromagnetic Compatibility
IS - 5
M1 - 9020021
ER -