Efficient view synthesis based error concealment method for multiview video plus depth

Vu Hiep Doan, Viet Anh Nguyen, Minh N Do

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents an efficient error concealment method for multiview video plus depth (MVD) delivery over error-prone channels based on the view synthesis information. Specifically, we propose an enhanced temporal error concealment (TEC) method by estimating the probable partition and missing MVs of a corrupted macroblock (MB) using the synthesized information. Furthermore, the view synthesis error concealment (VSEC) approach that directly uses the synthesized pixels to conceal the corrupted MBs is also adaptively utilized together with the TEC approach. Experimental results have shown the effectiveness of the proposed method compared with the existing methods in terms of both objective and subjective measures.

Original languageEnglish (US)
Title of host publication2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
Pages2900-2903
Number of pages4
DOIs
StatePublished - Sep 9 2013
Event2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China
Duration: May 19 2013May 23 2013

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

Other2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
CountryChina
CityBeijing
Period5/19/135/23/13

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Doan, V. H., Nguyen, V. A., & Do, M. N. (2013). Efficient view synthesis based error concealment method for multiview video plus depth. In 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 (pp. 2900-2903). [6572485] (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2013.6572485

Efficient view synthesis based error concealment method for multiview video plus depth. / Doan, Vu Hiep; Nguyen, Viet Anh; Do, Minh N.

2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013. 2013. p. 2900-2903 6572485 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Doan, VH, Nguyen, VA & Do, MN 2013, Efficient view synthesis based error concealment method for multiview video plus depth. in 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013., 6572485, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 2900-2903, 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013, Beijing, China, 5/19/13. https://doi.org/10.1109/ISCAS.2013.6572485
Doan VH, Nguyen VA, Do MN. Efficient view synthesis based error concealment method for multiview video plus depth. In 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013. 2013. p. 2900-2903. 6572485. (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2013.6572485
Doan, Vu Hiep ; Nguyen, Viet Anh ; Do, Minh N. / Efficient view synthesis based error concealment method for multiview video plus depth. 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013. 2013. pp. 2900-2903 (Proceedings - IEEE International Symposium on Circuits and Systems).
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