TY - GEN
T1 - Efficient scalar-vector product computation for signal processing
AU - Jones, Douglas L.
PY - 1989
Y1 - 1989
N2 - Two approaches for efficiently computing scalar-vector products achieve significant reductions in the number of additions relative to traditional binary multiplications. Sequential architectures implementing the digit-coding method in binary or two's-complement representation are similar in structure, memory, and computational requirements to distributed arithmetic. Digit-coded scalar-vector products do not recode the vector coefficients, and thus, unlike other techniques, allow equally efficient operation with time-varying coefficients and adaptive algorithms.
AB - Two approaches for efficiently computing scalar-vector products achieve significant reductions in the number of additions relative to traditional binary multiplications. Sequential architectures implementing the digit-coding method in binary or two's-complement representation are similar in structure, memory, and computational requirements to distributed arithmetic. Digit-coded scalar-vector products do not recode the vector coefficients, and thus, unlike other techniques, allow equally efficient operation with time-varying coefficients and adaptive algorithms.
UR - http://www.scopus.com/inward/record.url?scp=0024822892&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0024822892&partnerID=8YFLogxK
U2 - 10.1109/acssc.1989.1200743
DO - 10.1109/acssc.1989.1200743
M3 - Conference contribution
AN - SCOPUS:0024822892
SN - 0929029301
T3 - Conference Record - Asilomar Conference on Circuits, Systems & Computers
SP - 28
EP - 32
BT - Conference Record - Asilomar Conference on Circuits, Systems & Computers
PB - Publ by Maple Press, Inc
T2 - Twenty-Third Annual Asilomar Conference on Signals, Systems & Computers
Y2 - 30 October 1989 through 1 November 1989
ER -