Efficient scalar-vector product computation for signal processing

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Two approaches for efficiently computing scalar-vector products achieve significant reductions in the number of additions relative to traditional binary multiplications. Sequential architectures implementing the digit-coding method in binary or two's-complement representation are similar in structure, memory, and computational requirements to distributed arithmetic. Digit-coded scalar-vector products do not recode the vector coefficients, and thus, unlike other techniques, allow equally efficient operation with time-varying coefficients and adaptive algorithms.

Original languageEnglish (US)
Title of host publicationConference Record - Asilomar Conference on Circuits, Systems & Computers
EditorsRay R. Chen
PublisherPubl by Maple Press, Inc
Pages28-32
Number of pages5
ISBN (Print)0929029301
StatePublished - Dec 1 1989
EventTwenty-Third Annual Asilomar Conference on Signals, Systems & Computers - Pacific Grove, CA, USA
Duration: Oct 30 1989Nov 1 1989

Publication series

NameConference Record - Asilomar Conference on Circuits, Systems & Computers
Volume1
ISSN (Print)0736-5861

Other

OtherTwenty-Third Annual Asilomar Conference on Signals, Systems & Computers
CityPacific Grove, CA, USA
Period10/30/8911/1/89

ASJC Scopus subject areas

  • Engineering(all)

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