Efficient ASIP design for configurable processors with fine-grained resource sharing

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. In this paper, we investigate two techniques to improve these flows, so that ASIP can be efficiently applied to simple computer architectures in embedded applications. Firstly, we efficiently generate custom instructions with multi-cycle IO (which allows multi-outputs), thus removing the constraint imposed by the ports of the register file. Secondly, we allow identical portions of different custom instructions to be shared, thus allowing more custom instructions under the same area constraint. To handle the greatly increased exploration space, we propose several heuristics to keep the problem tractable. Experimental results show that we can achieve 3x speedup in some cases.

Original languageEnglish (US)
Title of host publicationFPGA 2008 - Sixteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Pages99-106
Number of pages8
DOIs
StatePublished - Dec 1 2008
Event16th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2008 - Monterey, CA, United States
Duration: Feb 24 2008Feb 26 2008

Publication series

NameACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Other

Other16th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2008
CountryUnited States
CityMonterey, CA
Period2/24/082/26/08

Keywords

  • Algorithms
  • Design
  • Experimentation
  • Performance

ASJC Scopus subject areas

  • Computer Science(all)

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  • Cite this

    Dinh, Q., Chen, D., & Wong, M. D. F. (2008). Efficient ASIP design for configurable processors with fine-grained resource sharing. In FPGA 2008 - Sixteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (pp. 99-106). (ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA). https://doi.org/10.1145/1344671.1344687