@inproceedings{d538fb0f9a1141a5bd42dc38766776bb,
title = "Efficient ASIP design for configurable processors with fine-grained resource sharing",
abstract = "Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. In this paper, we investigate two techniques to improve these flows, so that ASIP can be efficiently applied to simple computer architectures in embedded applications. Firstly, we efficiently generate custom instructions with multi-cycle IO (which allows multi-outputs), thus removing the constraint imposed by the ports of the register file. Secondly, we allow identical portions of different custom instructions to be shared, thus allowing more custom instructions under the same area constraint. To handle the greatly increased exploration space, we propose several heuristics to keep the problem tractable. Experimental results show that we can achieve 3x speedup in some cases.",
keywords = "Algorithms, Design, Experimentation, Performance",
author = "Quang Dinh and Deming Chen and Wong, {Martin D.F.}",
year = "2008",
doi = "10.1145/1344671.1344687",
language = "English (US)",
isbn = "9781595939340",
series = "ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA",
pages = "99--106",
booktitle = "FPGA 2008 - Sixteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays",
note = "16th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2008 ; Conference date: 24-02-2008 Through 26-02-2008",
}