Effective algorithm-accelerator co-design for ai solutions on edge devices

Cong Hao, Yao Chen, Xiaofan Zhang, Yuhong Li, Jinjun Xiong, Wen Mei Hwu, Deming Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution


High quality AI solutions require joint optimization of AI algorithms, such as deep neural networks (DNNs), and their hardware accelerators. To improve the overall solution quality as well as to boost the design productivity, efficient algorithm and accelerator co-design methodologies are indispensable. In this paper, we first discuss the motivations and challenges for the Algorithm/Accelerator co-design problem, and then provide several effective solutions. Especially, we highlight three leading works of effective co-design methodologies: 1) the first simultaneous DNN/FPGA co-design method; 2) a bi-directional light weight DNN and accelerator co-design method; 3) a differentiable and efficient DNN and accelerator co-search method. We demonstrate the effectiveness of the proposed co-design approaches using extensive experiments on both FPGAs and GPUs, with comparisons to existing works. This paper emphasizes the importance and efficacy of algorithm-accelerator co-design, and calls for more research breakthroughs in this interesting and demanding area.

Original languageEnglish (US)
Title of host publicationGLSVLSI 2020 - Proceedings of the 2020 Great Lakes Symposium on VLSI
PublisherAssociation for Computing Machinery
Number of pages8
ISBN (Electronic)9781450379441
StatePublished - Sep 7 2020
Event30th Great Lakes Symposium on VLSI, GLSVLSI 2020 - Virtual, Online, China
Duration: Sep 7 2020Sep 9 2020

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI


Conference30th Great Lakes Symposium on VLSI, GLSVLSI 2020
CityVirtual, Online

ASJC Scopus subject areas

  • General Engineering


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