This paper investigates the effect of uncertainty in chip failure rates on memory system reliability. It is shown, using real data on memory failures, that the dispersion in failure rates can be as large as 80%. An important consequence is to increase the unreliability of a memory system by up to 65%. Two simple models are proposed to evaluate the variability in memory reliability. The first is a worst case estimate and the second is a probabilistic model which needs only the mean and the standard deviation of the chip failure rate. With high failure rates, the maximum uncertainty in reliability occurs in the early system lifetime; with low failure rates, this effect is reversed.
ASJC Scopus subject areas
- Safety, Risk, Reliability and Quality
- Electrical and Electronic Engineering