Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs

Keyphrases

• Optimal Performance 100%
• Performance-based 100%
• Technology Mapping 100%
• FPGA Design 100%
• Edge Map 100%
• Table-driven 100%
• Specific Value 33%
• Flow Map 33%
• Mapping Algorithm 33%
• Optimal Delay 33%
• Cut Edge 33%
• Delay Model 33%
• FPGA Technology 33%
• Benchmark Circuits 33%
• General Delay 33%
• Efficient Technology 33%
• Circuit Delay 33%
• Network Cut 33%

Computer Science

• Optimal Performance 100%
• Table Lookup 100%
• Technology Mapping 100%
• Field Programmable Gate Arrays 100%
• Mapping Algorithm 33%
• Benchmark Circuit 33%

Engineering

• Field Programmable Gate Arrays 100%
• Optimal Performance 100%
• Lookup Table 100%
• Edge Map 100%
• Cut Edge 33%
• Delay Circuits 33%