Dynamic Memory Disambiguation Using the Memory Conflict Buffer

Research output: Contribution to journalArticle

Abstract

To exploit instruction level parallelism, compilers for VLIW and superscalar processors often employ static code scheduling. However, the available code reordering may be severely restricted due to ambiguous dependences between memory instructions. This paper introduces a simple hardware mechanism, referred to as the memory conflict buffer, which facilitates static code scheduling in the presence of memory store/load dependences. Correct program execution is ensured by the memory conflict buffer and repair code provided by the compiler. With this addition, significant speedup over an aggressive code scheduling model can be achieved for both non-numerical and numerical programs.

Original languageEnglish (US)
Pages (from-to)183-193
Number of pages11
JournalACM SIGPLAN Notices
Volume29
Issue number11
DOIs
StatePublished - Jan 11 1994

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design

Cite this

Gallagher, D. M., Chen, W. Y., Mahlke, S. A., Gyllenhaal, J. C., & Hwu, W. M. W. (1994). Dynamic Memory Disambiguation Using the Memory Conflict Buffer. ACM SIGPLAN Notices, 29(11), 183-193. https://doi.org/10.1145/195470.195534