Drowsy instruction caches. Leakage power reduction using dynamic voltage scaling and cache sub-bank prediction

Nam Sung Kim, Krisztian Flautner, David Blaauw, Trevor Mudge

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potential to increase power consumption. As feature sizes shrink, the dominant component of this power loss will be leakage. In our previous work we have shown how the drowsy circuit - a simple, state-preserving, low-leakage circuit that relies on voltage scaling for leakage reduction - can be used to reduce the total energy consumption of data caches by more than 50%. In this paper, we extend the architectural control mechanism of the drowsy cache to reduce leakage power consumption of instruction caches without significant impact on execution time. Our results show that data and instruction caches require different control strategies for efficient execution. To enable drowsy instruction caches, we propose a technique called cache sub-bank prediction which is used to selectively wake up only the necessary parts of the instruction cache, while allowing most of the cache to stay in a low leakage drowsy mode. This prediction technique reduces the negative performance impact by 76% compared to the no-prediction policy. Our technique works well even with small predictor sizes and enables an 86% reduction of leakage energy in a 64 K byte instruction cache.

Original languageEnglish (US)
Title of host publicationProceedings - 35th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2002
PublisherIEEE Computer Society
Pages219-230
Number of pages12
ISBN (Electronic)0769518591
DOIs
StatePublished - Jan 1 2002
Externally publishedYes
Event35th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2002 - Istanbul, Turkey
Duration: Nov 18 2002Nov 22 2002

Publication series

NameProceedings of the Annual International Symposium on Microarchitecture, MICRO
Volume2002-January
ISSN (Print)1072-4451

Other

Other35th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2002
Country/TerritoryTurkey
CityIstanbul
Period11/18/0211/22/02

Keywords

  • Dynamic voltage scaling
  • Tellurium

ASJC Scopus subject areas

  • Hardware and Architecture

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